Non-Determinism and Overcount on Modern Hardware Performance Counter Implementations

7 relevance

Non-determinism in hardware performance counters is technically deep and relevant to observability.

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Why It Matters

This matters for performance engineering and deterministic systems, as it challenges assumptions about hardware counter reliability on x86_64, a dominant architecture in cloud and infrastructure.

Key Takeaways

Evaluate alternative events like conditional branches or retired stores for deterministic measurements on x86_64, or consider non-x86 architectures for strict determinism.

Summary

The discussion is nascent, with the original post highlighting that x86_64 hardware performance counters exhibit non-determinism and overcount due to the iret instruction counting as userspace, while ARM, IA64, POWER, and SPARC show more determinism. Commenters have not yet engaged, but the thread raises concerns about using these counters for deterministic replay or threading libraries.